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|---|---|---|---|
| 008 | 230913s9999 xx 000 0 und d | ||
| 082 | _a621.39 pla | ||
| 100 | _aPlanitkar, Samir | ||
| 245 | 0 | _aVerilog Hdl: A Guide To Digital Design And Systhesis | |
| 250 | _aII | ||
| 260 | _aDELHI | ||
| 260 | _bPEARSON | ||
| 260 | _c2007 | ||
| 300 | _a490 | ||
| 650 | _aElectronics Engineering | ||
| 999 |
_c133934 _d133934 |
||